Adaptive Virtual Devices Platform for verification of FPGA modules in student courses on Digital Design

Author

Hocenski, Zeljko ; Aleksi, Ivan ; Sruk, Vlado

Author_Institution

Fac. of Electr. Eng., Univ. of Osijek, Osijek, Croatia

fYear

2013

fDate

10-13 Nov. 2013

Firstpage

22

Lastpage

27

Abstract

This paper describes the FPGA based verification platform that is dedicated to improve student efficiency for the course on Digital Design with FPGAs. We developed a functional verification platform that extends the number of I/O devices, which is usually limited on development kits. Simple PicoBlaze CPU-based design is used to synchronize the input and output signals between PC and the FPGA. Complete verification platform occupies only 14% of the Spartan 3 XC3S200 FPGA device. During the course, students get the knowledge about the PicoBlaze CPU and it´s assembly language, as well as getting familiar with the FPGAs and VHDL. At the end of the lectures, students are able to understand the HW/SW co-design and to use the verification platform for making their final project.

Keywords

CAD; computer aided instruction; electronic engineering computing; electronic engineering education; field programmable gate arrays; virtual instrumentation; FPGA based verification platform; FPGA modules verification; HW/SW codesign; PicoBlaze CPU-based design; Spartan 3 XC3S200 FPGA device; VHDL; adaptive virtual devices platform; digital design; functional verification platform; student courses; Adders; Debugging; Field programmable gate arrays; Graphical user interfaces; Hardware; Hardware design languages; Software; FPGA validation; FPGA verification; HDL development process; PicoBlaze CPU; debugging HDL modules;

fLanguage

English

Publisher

ieee

Conference_Titel

e-Learning in Industrial Electronics (ICELIE), 2013 7th IEEE International Conference on

Conference_Location

Vienna

Type

conf

DOI

10.1109/ICELIE.2013.6701265

Filename

6701265