Design and reliability analysis of voltage reference circuit in 180 nm CMOS process

This paper investigates the reliability of voltage reference circuit from the viewpoint of LSI layout design. In the LSI layout design, guard ring structure, voltage/ground source impedance, and location of MOS finger are very important factor, and therefore we designed two types; the one is without any consideration of layout factor, the one is considered. From the measurement results, we conduce that robust circuit requires guard ring strongly tied to ground, wide voltage/ground line, and MOS finger which is oriented in the same direction.