Fabrication, electrical characterization and reliability study of partially electroplated tapered copper through-silicon vias

The fabrication, electrical characterization and reliability study of copper through-silicon via (TSV) is reported. All the fabrication steps needed in this process have a process temperature <; 250°C. The copper TSVs have two distinct features: tapered via profile and partial filling of the vias. Besides the single Kelvin cell TSVs, daisy chains having up to 1400 TSVs were also fabricated and characterized. The measured electrical resistance of a single Kelvin TSV was between 3-10 MÛ. Later, these partially filled TSVs were subjected to various thermal and electrical cycling tests to study their behavior under different stress conditions. Electrical resistance of these TSVs was found to be stable under these tests; however certain TSV failure were also observed. Preliminary study has shown that via etching and via-filling related defects were the main reasons behind these failures. These cost-effective TSVs were implemented in the wafer level capping of MEMS resonators.