Enabling energy efficient protocol processing for passive RFID sensors using sub/near-threshold circuit

Recent research trend of passive RFID based sensors has posed stringent low power requirement for energy efficient communication, which can be addressed by sub/near-Vt operation with standard CMOS process. This paper discusses new design challenges under scaled voltages and presents critical building blocks for low power protocol processing. Two supply viltages -0.45V and 0.7V are selected for powering digital and analog circuits which process EPC Gen-2 physical layer data. The design was fabricated in 180nm CMOS process and probe station measurement are reported.