DocumentCode
678783
Title
Compilation optimization exploration for thermal dissipation reduction in embedded systems
Author
Ben Saad, Montassar ; Jedidi, Anis ; Niar, Smail ; Abid, Mohamed
Author_Institution
Nat. Sch. of Eng., Univ. of Sfax, Sfax, Tunisia
fYear
2013
fDate
16-18 Dec. 2013
Firstpage
1
Lastpage
3
Abstract
The ever-increasing transistor integration density has allowed to design complex and powerful system-on-chips (SoC). As a consequence, the power density also increased significantly in the SoC, as well as, the accompanying heat. These two results have a negative impact on the performance of the SoC. Thermal dissipation and power-density are important factors that may degrade significantly the reliability and the lifetime of the SoC. These aspects will limit the next generation embedded system performances. Traditionally, thermal problems are solved by employing on advanced packaging and cooling solutions. But the modern high-performance SoC is already pushing the limits of what the cooling solutions can offer. By opposition to the existing approaches, in this paper, thermal dissipation is controlled at the source code level. The different compilation optimizations are explored to find the best performance/thermal dissipation tradeoffs.
Keywords
cooling; embedded systems; integrated circuit packaging; integrated circuit reliability; optimisation; system-on-chip; SoC; compilation optimization exploration; compilation optimizations; cooling; negative impact; next generation embedded system; packaging; power density; reliability; source code level; system-on-chips; thermal dissipation reduction; transistor integration density; Decision support systems; Hafnium; EV6 processor; Embedded systems; HotSpot simulator; Termal dissipation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Test Symposium (IDT), 2013 8th International
Conference_Location
Marrakesh
Type
conf
DOI
10.1109/IDT.2013.6727121
Filename
6727121
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