Highly efficient fast architectures for discrete wavelet transforms based on their flowgraph representation

Flowgraph representation of discrete wavelet transforms (DWTs) is presented which can be considered as a new alternative definition of wavelets. It is shown that this representation is useful for developing efficient algorithms and VLSI architectures. As an examples two DWT architectures are proposed with the efficiency (counted as the measure of the average utilization of PEs) of approximately 100%. Proposed architectures are very fast and provide excellent performance with respect to area-time characteristics (see Table 1). They are scalable, simple, regular, and free of long connections (depending on the length of input signal). Results can be easily extended to inverse DWTs as well.