• DocumentCode
    703505
  • Title

    Multi FPGA processor for gray-scale morphology

  • Author

    Akil, Mohamed ; Zahirazami, Shahram

  • Author_Institution
    LPSI, Groupe ESIEE, Noisy le Grand, France
  • fYear
    1998
  • fDate
    8-11 Sept. 1998
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Local operations in image processing are often used, namely during the preprocessing step. On one hand, their implementation is expensive, on the other hand, they become efficient when they use a wide area neighborhood. In this paper we propose a general method for synthesis of linear and non linear filters (mathematical morphology operators). The main interest of this method is that it can be applied to various types of filters: separable or not, factorizable or not and for any size of the filter kernel (convolution) or the structuring element (mathematical morphology). From this method, one can get an architecture in a straightforward way. We propose a re-configurable architecture, based upon reprogrammable circuits (FPGA: Field Programmable Gate Array). This multi FPGA architecture allows a real time implementation of any r × c size kernel (processing at video rate).
  • Keywords
    field programmable gate arrays; image processing; mathematical morphology; nonlinear filters; reconfigurable architectures; field programmable gate array; filter kernel; gray-scale morphology; image processing; linear filter design; mathematical morphology operators; multiFPGA processor; nonlinear filters design; reconfigurable architecture; reprogrammable circuits; Computer architecture; Convolution; Digital filters; Field programmable gate arrays; Image processing; Kernel; Morphology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Conference (EUSIPCO 1998), 9th European
  • Conference_Location
    Rhodes
  • Print_ISBN
    978-960-7620-06-4
  • Type

    conf

  • Filename
    7089976