DocumentCode
709816
Title
NBTI in Si0.55 Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures
Author
Franco, Jacopo ; Kaczer, Ben ; Roussel, Philippe J. ; Bury, Erik ; Mertens, Hans ; Ritzenthaler, Romain ; Grasser, Tibor ; Horiguchi, Naoto ; Thean, Aaron ; Groeseneken, Guido
Author_Institution
imec, Leuven, Belgium
fYear
2015
fDate
19-23 April 2015
Abstract
SiGe channel planar pMOSFETs have been recently shown to offer improved NBTI reliability, owing to reduced hole trapping into pre-existing oxide defects and reduced interface state generation. In this paper we report a broad set of experimental data of SiGe cladding finFETs with varying fin widths, and we show that the intrinsically superior NBTI reliability can be ported to 3D architectures of relevance for N10 and beyond. The underlying physical mechanisms are discussed and compared to planar technologies.
Keywords
CMOS integrated circuits; Ge-Si alloys; MOSFET; integrated circuit reliability; negative bias temperature instability; semiconductor materials; 3D architectures; NBTI; Si0.55Ge0.45; SiGe cladding finFETs; fin widths; planar technologies; reliability; Charge carrier processes; Degradation; Interface states; Reliability; Silicon; Silicon germanium; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium (IRPS), 2015 IEEE International
Conference_Location
Monterey, CA
Type
conf
DOI
10.1109/IRPS.2015.7112694
Filename
7112694
Link To Document