DocumentCode
710643
Title
MBIST and statistical hypothesis test for time dependent dielectric breakdowns due to GOBD vs. BTDDB in an SRAM array
Author
Woongrae Kim ; Chang-Chih Chen ; Soonyoung Cha ; Milor, Linda
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2015
fDate
27-29 April 2015
Firstpage
1
Lastpage
6
Abstract
In this paper we present Memory Built-In Self-Test (MBIST) diagnosis methodologies for failure analysis of time-dependent breakdown due to gate oxide breakdown (GOBD) and backend time-dependent dielectric breakdown (BTDDB) in an SRAM array. First, a Built-In Self-Test (BIST) system and algorithm detect the breakdown mechanisms and identify the locations of the faulty sites in SRAM cells. Then, probabilities of failure are estimated for BTDDB and GOBD by matching the observed failure rate from BIST and the expected failure distribution functions from system simulations under realistic use scenarios, with different simulated failure rates for BTDDB and GOBD.
Keywords
SRAM chips; built-in self test; failure analysis; semiconductor device breakdown; statistical testing; BIST system; BTDDB; GOBD; MBIST diagnosis method; SRAM array; backend time-dependent dielectric breakdown; failure analysis; failure distribution function; gate oxide breakdown; memory built-in self-test; statistical hypothesis test; Arrays; Built-in self-test; Circuit faults; Logic gates; SRAM cells; Transistors; BTDDB; Built-In Self-Test (BIST); GOBD; dielectric breakdown; statistical hypothesis test; wearout distribution; wearout mechanisms;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium (VTS), 2015 IEEE 33rd
Conference_Location
Napa, CA
Type
conf
DOI
10.1109/VTS.2015.7116289
Filename
7116289
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