DocumentCode
715934
Title
LSI aging estimation using ring oscillators
Author
Miura, Yukiya ; Ikeda, Tatsunori
Author_Institution
Fac. of Syst. Design, Tokyo Metropolitan Univ., Tokyo, Japan
fYear
2015
fDate
25-29 May 2015
Firstpage
1
Lastpage
2
Abstract
Transistor aging occurs in nanoscale technologies and is one of the factors that degrade the performance of LSIs. This paper presents a method for estimating the amount of increment in the delay time of an LSI and a method for estimating the amount of increment in the threshold voltage per transistor from the changes in the period of two ring oscillators by aging.
Keywords
ageing; large scale integration; nanotechnology; oscillators; transistors; LSI aging estimation; nanoscale technologies; ring oscillators; transistor aging; Aging; Delays; Estimation; Field effect transistors; Large scale integration; Logic gates; MOS devices; Aging (Degradation); CHC; Delay time; NBTI; PBTI; Ring oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ETS), 2015 20th IEEE European
Conference_Location
Cluj-Napoca
Type
conf
DOI
10.1109/ETS.2015.7138765
Filename
7138765
Link To Document