DocumentCode
718029
Title
Moving toward gray box predictive models at micro-architecture level by investigating program inherent parallelism
Author
Ahmadinejad, Hoda ; Fatemi, Omid
Author_Institution
ECE Dept., Univ. of Tehran, Tehran, Iran
fYear
2015
fDate
10-14 May 2015
Firstpage
699
Lastpage
704
Abstract
Predictive modeling has gained much attention in last decade aiming the evaluation of different design points in Design Space Exploration (DSE) process. However, predictive model construction still requires costly simulations for every new and unseen application. To reduce the number of simulations, several cross program performance prediction schemes are developed. These schemes can be more efficient if they use application characteristics or signature. The main challenge is to find the best representative characteristics and how they contribute to predictive models. In this paper, we introduce a characteristic to represent the inherent parallelism of applications and to measure performance sensitivity to issue width changes. We show that this characteristic can better predict inherent parallelism than data dependency distance and instruction mix, which are proposed by previous works.
Keywords
integrated circuit design; integrated circuit modelling; microprocessor chips; multiprocessing systems; system-on-chip; DSE process; MPSoC; cross program performance prediction schemes; data dependency distance; design space exploration; gray box predictive models; instruction mix; microarchitecture level; multiprocessor system-on-chip; predictive model construction; program inherent parallelism; Conferences; Decision support systems; Electrical engineering; Erbium; application characteristics; cross program performance prediction; issue width; predictive modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering (ICEE), 2015 23rd Iranian Conference on
Conference_Location
Tehran
Print_ISBN
978-1-4799-1971-0
Type
conf
DOI
10.1109/IranianCEE.2015.7146304
Filename
7146304
Link To Document