Multi-rate Clock-Data recovery solution in high speed serial links

Clock-Data recovery (CDR) architecture with multirate option in receiver of a high-speed serial link presented. Proper clock phase choosing and let it track data phase shifts over time are the main difficulties of all kind of CDR structures. This system helps to shift reference clock according to data signal phase to sample it in the most secure way regarding data errors and information loses. Meanwhile, since data signal can change phase over time due to noises and other uncertainties (jitter in the input point of receiver), CDR system should have some tracking option which could track data phase shifts over time and accordingly change phase of reference clock which coming from PLL.