Modification of fault injection method via on-chip debugging for processor cores of systems-on-chip

In this paper a new solution of fault injection in the processor cores of systems on a chip is presented. It consists in the placement of infrastructure injection of single fault in a system-on-chip as an intellectual property core. This simplifies fault injection environment, improve the performance of ongoing injections, as well as allows doing long autonomous fault injection with the appropriate construction unit injection. The solution has been applied to a LEON3 processor. The results from the use of solutions demonstrate its simplicity and performance.