DocumentCode
719525
Title
A Reliable Cross-Point MLC ReRAM with Sneak Current Compensation
Author
Jong-Min Baek ; Sang-Yun Kim ; Jae-Koo Park ; Jae-Young Park ; Kee-Won Kwon
Author_Institution
Coll. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea
fYear
2015
fDate
17-20 May 2015
Firstpage
1
Lastpage
4
Abstract
In this paper, a reliable cross-point MLC ReRAM is introduced and fully integrated with 350nm CMOS technology. Both resistance states and variations are widely investigated with different compliance current. The self-termination scheme is adopted to prevent overstress to switched cell in set operation. As a result of self termination, write failure is prohibited and the uniformity on LRS of 300 uA compliance improved 2.3 times. In order to deter the compliance current offset in set operation, a sneak current compensation scheme of which controlled by ADC is proposed.
Keywords
CMOS memory circuits; multivalued logic circuits; resistive RAM; CMOS technology; compliance current offset; cross-point MLC ReRAM; current 300 muA; self-termination scheme; size 350 nm; sneak current compensation; write failure; Arrays; Current measurement; Microprocessors; Reliability; Resistance; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Workshop (IMW), 2015 IEEE International
Conference_Location
Monterey, CA
Print_ISBN
978-1-4673-6931-2
Type
conf
DOI
10.1109/IMW.2015.7150272
Filename
7150272
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