DocumentCode
721190
Title
Efficient workload characterization technique for heterogeneous processors
Author
Anuradha, P. ; Rallapalli, Hemalatha ; Narasimha, G. ; Ahmed, Syed Musthak
Author_Institution
Electron. & Commun. Eng., Varadha Reddy Coll. of Eng., Warangal, India
fYear
2015
fDate
12-13 June 2015
Firstpage
812
Lastpage
817
Abstract
As the embedded computing becomes advanced, more and more functionality is becoming available on the mobile devices. The workloads on earlier generations of mobile devices were mostly limited to chat, e-mail or Web browsing apart from the use as phones. Multi-media workloads such as the video are on the rise; in addition many users play games or use apps on the latest mobile devices. The emergence of these new workloads has resulted in the high performance demands on the mobile devices. System level design space exploration for high performance embedded systems is a very important problem that has become very challenging due to the advent of multi cores, GPUs, FPGAs and DSPs along with a large variety of energy efficient memory systems. To perform efficient design space exploration for SoCs adopted workload characterizations approach. This paper shows workload characterization for a variety of heterogeneous processors such as the DSPs and FPGAs.
Keywords
embedded systems; integrated circuit design; microprocessor chips; system-on-chip; DSP; FPGA; SoC; Web browsing; e-mail; embedded computing; energy efficient memory systems; heterogeneous processors; high performance embedded systems; mobile devices; multimedia workloads; system level design space exploration; workload characterization technique; Analytical models; Clocks; Communications technology; Correlation; Decoding; Field programmable gate arrays; Q measurement; DSP; FPGA; PCA; Workloads;
fLanguage
English
Publisher
ieee
Conference_Titel
Advance Computing Conference (IACC), 2015 IEEE International
Conference_Location
Banglore
Print_ISBN
978-1-4799-8046-8
Type
conf
DOI
10.1109/IADCC.2015.7154819
Filename
7154819
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