DocumentCode
72142
Title
BLAKE-512-Based 128-Bit CCA2 Secure Timing Attack Resistant McEliece Cryptoprocessor
Author
Ghosh, Sudip ; Verbauwhede, Ingrid
Author_Institution
Intel Labs., Intel Corp., Hillsboro, OR, USA
Volume
63
Issue
5
fYear
2014
fDate
May-14
Firstpage
1124
Lastpage
1133
Abstract
This paper presents a 128-bit CCA2-secure McEliece cryptoprocessor. The existing side-channel vulnerabilities in this regard are also taken care during the implementation of such a post-quantum immune code-based cryptosystem. In order to achieve CCA2 security on original McEliece algorithm, we incorporate a SHA-3 finalist, BLAKE-512 module into the architecture. A complete binary-XGCD algorithm for Goppa field is introduced. The final design on a Virtex-6 FPGA performs an encryption in 4.74 μs and a decryption in 0.92 ms. To the best of our knowledge, this is the first hardware design of McEliece with the above mentioned advanced security features which is also resistant against existing timing attacks.
Keywords
cryptography; field programmable gate arrays; logic design; microprocessor chips; BLAKE-512 module; CCA2 secure timing attack resistant McEliece cryptoprocessor; CCA2 security; Goppa field; McEliece algorithm; SHA-3; Virtex-6 FPGA; architecture; binary-XGCD algorithm; decryption; encryption; hardware design; post-quantum immune code-based cryptosystem; side-channel vulnerabilities; storage capacity 128 bit; Algorithm design and analysis; Clocks; Encryption; Polynomials; Vectors; FPGA platform; McEliece; post-quantum cryptography; programmable architecture; side-channel attack;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2012.271
Filename
6357184
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