DocumentCode
725103
Title
Enhanced etch process for TSV & deep silicon etch
Author
Qing Xu ; Paterson, Alex ; McChesney, Jon ; Dover, Russell ; Yamaguchi, Yoko ; Eppler, Aaron
Author_Institution
Lam Res. Corp., Fremont, CA, USA
fYear
2015
fDate
3-6 May 2015
Firstpage
426
Lastpage
428
Abstract
One of the key challenges of deep Si etch is feature control versus high etch rate. Scallop sizes increase with increased etch rate and uniformity degrades. This paper provides an overview of an enhanced rapid alternating process (RAP) in combination with a hardware design that breaks this trade off. Scallop control is achieved through very fast switching of gasses, bias and pressure (up to 10 times faster than the typical Bosch process). This new RAP is combined with a proprietary gas injection architecture to ensure uniformity of depth, both locally and across the wafer, by ensuring uniform dissociation of feedstock. Finally, this paper will show how a robust design has to address the challenges of increased thermal loads which can manifest as etch rate drifts and depth uniformity variations. The result is an increase in TSV throughput by > 200% and a reduction in scallop size by ten-fold.
Keywords
etching; integrated circuit design; three-dimensional integrated circuits; RAP; Si; TSV; deep silicon etch; depth uniformity variations; enhanced etch process; etch rate drifts; hardware design; proprietary gas injection; rapid alternating process; scallop control; thermal loads; through silicon via; uniform feedstock dissociation; Heating; Reliability; CIS; TSV; deep silicon etch; high etch rate; scallops;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference (ASMC), 2015 26th Annual SEMI
Conference_Location
Saratoga Springs, NY
Type
conf
DOI
10.1109/ASMC.2015.7164434
Filename
7164434
Link To Document