• DocumentCode
    726278
  • Title

    Walking a thin line - performance and quality grading vs. yield overcut

  • Author

    Bowen, Carl

  • Author_Institution
    Adv. Micro Devices (AMD), Austin, TX, USA
  • fYear
    2015
  • fDate
    8-12 June 2015
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Product engineers are continually working to balance product cost, schedules and quality. A significant contributor to all three dimensions is enabling the appropriate test coverage to provide the required quality levels while minimizing yield overcut. This challenge is magnified by complexities created by advanced power management and the need for performance grading across various power states. This talk will describe these challenges and approaches that AMD is taking to address them.
  • Keywords
    integrated circuit testing; product quality; system-on-chip; AMD; advanced power management; power states; product cost; product quality; product scheduling; quality grading; system on chip; thin line performance; yield overcut minimization; Built-in self-test; Complexity theory; Optimization; Performance evaluation; Power demand; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE
  • Conference_Location
    San Francisco, CA
  • Type

    conf

  • DOI
    10.1145/2744769.2747949
  • Filename
    7167188