A 65-nm low power ECG feature extraction system

This paper presents a real-time adaptive ECG detection and delineation algorithm alongside an architecture based on time-domain signal processing of the ECG signal. The algorithm is enhanced to detect large number of different P-QRS-T waveform morphologies using adaptive search windows and adaptive threshold levels. The proposed architecture has been implemented in the state-of-the-art 65-nm CMOS technology. It occupied 0.03416 mm2 area and consumed 0.614 mW power. Furthermore, the non-complex nature of the architecture resulted with a realization using smaller number of computation and higher performance. The design of the QRS detector was tested on ECG records obtained from the Physionet QT database and achieved a sensitivity of Se =99.83% and a positive predictivity of P⁺= 98.65%. Similarly, the mean error values of the T peak, T offset, P peak and P offset were found to be -1.367, 6.36, 5.5 and -2.59 milliseconds, respectively, using the same database. The small area, low power, and high performance of our architecture makes it suitable for inclusion in System On Chips (SOCs) targeting wearable mobile medical devices.