• DocumentCode
    729043
  • Title

    ESD protection design for gigahertz differential LNA in a 65-nm CMOS process

  • Author

    Chun-Yu Lin ; Mei-Lian Fan ; Wei-Hao Fu

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Normal Univ., Taipei, Taiwan
  • fYear
    2015
  • fDate
    26-29 May 2015
  • Firstpage
    322
  • Lastpage
    324
  • Abstract
    The electrostatic discharge (ESD) immunity test for EMC was one important reliability regulation. The turn-on-efficient on-chip ESD protection circuit is required to clamp the overstress voltage. A new design of ESD protection diodes with embedded silicon-controlled rectifier (SCR) was proposed to protect the gigahertz differential low-noise amplifier (LNA). Experimental results had shown that the proposed ESD protection design for the differential LNA can achieve excellent ESD robustness and good RF performances.
  • Keywords
    CMOS integrated circuits; differential amplifiers; electromagnetic compatibility; electrostatic discharge; immunity testing; integrated circuit reliability; low noise amplifiers; semiconductor diodes; thyristors; CMOS process; EMC; ESD protection design; ESD protection diode; SCR; complementary metal oxide semiconductor; electromagnetic compatibility; electrostatic discharge immunity test; embedded silicon-controlled rectifier; gigahertz differential LNA; low-noise amplifier; on-chip ESD protection circuit; overstress voltage; reliability regulation; size 65 nm; CMOS integrated circuits; Current measurement; Electrostatic discharges; Layout; Radio frequency; Stress; Thyristors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetic Compatibility (APEMC), 2015 Asia-Pacific Symposium on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4799-6668-4
  • Type

    conf

  • DOI
    10.1109/APEMC.2015.7175245
  • Filename
    7175245