Energy-efficient control through power mode placement with discrete DVFS and Body Bias

Dynamic Voltage and Frequency Scaling (DVFS) is a very efficient way to manage performance/power trade-off in embedded systems. It consists in switching between low and high voltage-frequency operating points according to the required processing performance. However, with novel technologies such as UTBB FD-SOI, circuits can be designed to work on very wide frequency ranges. In this case, substantial power savings can be achieved through efficient power mode design. In this paper, we propose a method to determine the optimal position of intermediate operating points that maximizes the power reduction on the operating frequency range by exploiting Body Bias combined with DVFS. Results from circuit measurements illustrate the efficiency of the proposed method with average power reduction up to 35% on a 1800MHz wide operating frequency range, with peaks up to 50.3%.