DocumentCode
741265
Title
RFFE: A Buffer Cache Management Algorithm for Flash-Memory-Based SSD to Improve Write Performance
Author
Ramasamy, Arul Selvan ; Karantharaj, Porkumaran
Author_Institution
Inf. & Commun. Eng., Anna Univ., Chennai, India
Volume
38
Issue
3
fYear
2015
Firstpage
219
Lastpage
231
Abstract
Flash-memory-based solid-state drives use multiple NAND flash memory chips as storage media and deploy a large-sized random access memory (RAM) inside it. This RAM buffer absorbs the read and write requests by file systems, and thus the resulting write requests to NAND flash memory are determined by the buffer replacement scheme. Many of the previously proposed algorithms concentrate on improving the random write performance by reordering the writes, addressing the temporal locality, or evicting the clean pages beforehand. However, the sequential write patterns in the incoming write stream are not completely utilized by the flash translation layer; this increases garbage collection overhead. To overcome this limitation, we propose a novel algorithm, called random first flash enlargement (RFFE), to improve the performance of the write operation. The algorithm identifies the interleaved sequential writes and builds various policy decisions, and the write sequence is constructed by contemplating the flash memory characteristics. In particular, the write stream is written into an appropriate log block area. Trace driven simulation is compared with the previously proposed least recently used fully-associative sector translation (FAST), block padding least recently used (BPLRU), and recently-evicted-first (REF) buffer management schemes. The result shows that the RFFE outperforms the previously proposed schemes with respect to merge, erase, and write count.
Keywords
cache storage; flash memories; random-access storage; storage management; BPLRU; FAST; NAND flash memory chip; RAM; REF; RFFE; SSD; block padding least recently used; buffer cache management algorithm; fully-associative sector translation; random access memory; random first flash enlargement; recently-evicted-first; solid-state drive; write performance improvement; Algorithm design and analysis; Ash; Computers; Operating systems; Performance evaluation; Random access memory; Switches; Buffer management; destage; enlargement; erase before write; full merge; log block; random write; sequential write; switch merge; write amplification;
fLanguage
English
Journal_Title
Electrical and Computer Engineering, Canadian Journal of
Publisher
ieee
ISSN
0840-8688
Type
jour
DOI
10.1109/CJECE.2015.2431745
Filename
7230331
Link To Document