• DocumentCode
    74509
  • Title

    Sample-and-hold circuit with dynamic switch leakage compensation

  • Author

    Zou, L. ; Pathrose, Jerrin ; Chai, Kevin T. C. ; Je, Minkyu ; Xu, Yong Ping

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
  • Volume
    49
  • Issue
    21
  • fYear
    2013
  • fDate
    October 10 2013
  • Firstpage
    1323
  • Lastpage
    1325
  • Abstract
    For sample-and-hold (S/H) circuits operating at low sampling rate and high temperature, the switch leakage current is one of the major error sources. A S/H circuit with dynamic switch leakage compensation is presented. The proposed leakage current compensation circuit generates switch leakage replicas that track the actual leakages in the sampling switches. A bidirectional current steering circuit allows the switch leakage to be dynamically compensated with the leakage replicas. A prototype S/H circuit is fabricated in a 1 μm silicon-on-isolation CMOS technology. Measurement has shown the effectiveness of dynamic leakage current compensation up to 280°C with a maximum 75% leakage reduction.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; leakage currents; sample and hold circuits; ADC; S-H circuits; analogue-to-digital converters; bidirectional current steering circuit; dynamic switch leakage compensation; error sources; leakage current compensation circuit; leakage replicas; sample-and-hold circuits; sampling switches; silicon-on-isolation CMOS technology; size 1 mum; temperature 280 degC;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2013.2092
  • Filename
    6651356