DocumentCode
745364
Title
An Efficient Parity Checking Scheme for Random and Burst Errors
Author
Murthy, B. R Naayana
Author_Institution
Vicom Division, Vidar Corporation, Mt.View, CA, USA
Volume
24
Issue
2
fYear
1976
fDate
2/1/1976 12:00:00 AM
Firstpage
249
Lastpage
254
Abstract
In this concise paper we describe an efficient scheme for random and burst error checking by a combination of serial parity checking and convolutional interleaving. The framing for interleaved blocks is shown possible by a simple implementation, and the error detection capability is better than other schemes similar in complexity. The proposed scheme has useful applications for digital transmission.
Keywords
Burst noise; Convolutional codes; Error-detecting codes; Interleaved coding; Interleaved codes; Microwave devices; Notice of Violation; Parity check codes; Power generation; Relays; Solid state circuits; System testing; Varactors; Voltage;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOM.1976.1093269
Filename
1093269
Link To Document