DocumentCode
748141
Title
Latchup-free ESD protection design with complementary substrate-triggered SCR devices
Author
Ker, Ming-Dou ; Hsu, Kuo-Chun
Author_Institution
Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
Volume
38
Issue
8
fYear
2003
Firstpage
1380
Lastpage
1392
Abstract
The turn-on mechanism of silicon-controlled rectifier (SCR) devices is essentially a current triggering event. While a current is applied to the base or substrate of an SCR device, it can be quickly triggered on into its latching state. In this paper, latchup-free electrostatic discharge (ESD) protection circuits, which are combined with the substrate-triggered technique and an SCR device, are proposed. A complementary circuit style with the substrate-triggered SCR device is designed to discharge both the pad-to-VSS and pad-to-VDD ESD stresses. The novel complementary substrate-triggered SCR devices have the advantages of controllable switching voltage, adjustable holding voltage, faster turn-on speed, and compatible to general CMOS process without extra process modification such as the silicide-blocking mask and ESD implantation. The total holding voltage of the substrate-triggered SCR device can be linearly increased by adding the stacked diode string to avoid the transient-induced latchup issue in the ESD protection circuits. The on-chip ESD protection circuits designed with the proposed complementary substrate-triggered SCR devices and stacked diode string for the input/output pad and power pad have been successfully verified in a 0.25-μm salicided CMOS process with the human body model (machine model) ESD level of ∼7.25 kV (500 V) in a small layout area.
Keywords
CMOS integrated circuits; electrostatic discharge; protection; thyristors; 0.25 micron; 500 V; 7.25 kV; CMOS process compatibility; ESD stresses; adjustable holding voltage; complementary circuit style; complementary substrate-triggered SCR devices; controllable switching voltage; current triggering event; electrostatic discharge protection circuits; latchup-free ESD protection design; salicided CMOS process; silicon-controlled rectifier; turn-on mechanism; turn-on speed; Biological system modeling; CMOS process; Circuits; Diodes; Electrostatic discharge; Protection; Rectifiers; Semiconductor device modeling; Stress; Thyristors;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2003.814434
Filename
1214731
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