• DocumentCode
    751781
  • Title

    Survey of low-power testing of VLSI circuits

  • Author

    Girard, Patrick

  • Author_Institution
    Lab. of Informatics Robotics & Microelectron., Montpellier, France
  • Volume
    19
  • Issue
    3
  • fYear
    2002
  • Firstpage
    80
  • Lastpage
    90
  • Abstract
    The author reviews low-power testing techniques for VLSI circuits. He prefaces this with a discussion of power consumption that gives reasons for and consequences of increased power during test. He ends with a discussion of the opportunity to use such techniques in varying situations
  • Keywords
    VLSI; built-in self test; integrated circuit testing; low-power electronics; BIST; VLSI circuit testing; low-power testing; power consumption; power modeling; system-on-a-chip; Circuit testing; Energy consumption; Frequency; Hardware; Packaging; Power dissipation; Power engineering and energy; Switching circuits; System testing; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2002.1003802
  • Filename
    1003802
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=751781