• DocumentCode
    754794
  • Title

    A Linear-Time Approach for Static Timing Analysis Covering All Process Corners

  • Author

    Onaissi, Sari ; Najm, Farid N.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Toronto Univ., Toronto, ON
  • Volume
    27
  • Issue
    7
  • fYear
    2008
  • fDate
    7/1/2008 12:00:00 AM
  • Firstpage
    1291
  • Lastpage
    1304
  • Abstract
    Manufacturing process variations lead to circuit timing variability and a corresponding timing yield loss. Traditional corner analysis consists of checking all process corners (combinations of process parameter extremes) to make sure that circuit timing constraints are met at all corners, typically by running static timing analysis (STA) at every corner. This approach is becoming too expensive due to the increase in the number of corners with modern processes. As an alternative, we propose a linear-time approach for STA which covers all process corners in a single pass. Our technique assumes a linear dependence of delays and slews on process parameters and provides estimates of the worst case circuit delay and slew. It exhibits high accuracy in practice, and if the circuit has gates and relevant process parameters, the complexity of the algorithm is O(mn).
  • Keywords
    delay circuits; integrated circuit yield; timing circuits; circuit timing variability; corner analysis; linear-time approach; static timing analysis; timing yield loss; worst case circuit delay; Delay estimation; Delay lines; Distributed computing; Helium; Integrated circuit technology; Manufacturing processes; Parameter estimation; Timing; Very large scale integration; Voltage; Hyperplanes; multicorner; process variations; static timing analysis (STA);
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2008.923635
  • Filename
    4544868