DocumentCode
756585
Title
A Single-Chip CMOS PCM Codec
Author
Kelley, Steve ; Ulmer, Dick
Author_Institution
Motorola Semiconductor Group, Phoenix, AZ
Volume
27
Issue
2
fYear
1979
fDate
2/1/1979 12:00:00 AM
Firstpage
312
Lastpage
317
Abstract
A single-chip full duplex per channel PCM codec implemented in a metal gate CMOS process is presented. An 8-bit companding DAC, a novel autozeroed analog subsystem, and a 3.5-MHz frame interface control logic comprise the 175 × 195-mil integrated circuit. The DAC is implemented with matched
-channel devices and utilizes redundancy and feedback to achieve the required accuracy. The analog subsystem contains two sample and hold circuits, autozeroing circuitry, CMOS amplifiers, and a fast CMOS compatator. The circuit operates from a single supply, consumes 90 mW (typ) and features a powerdown capability to less than 1 mW (max). Individual component performance and the resulting system performance are quantified within the text.
-channel devices and utilizes redundancy and feedback to achieve the required accuracy. The analog subsystem contains two sample and hold circuits, autozeroing circuitry, CMOS amplifiers, and a fast CMOS compatator. The circuit operates from a single supply, consumes 90 mW (typ) and features a powerdown capability to less than 1 mW (max). Individual component performance and the resulting system performance are quantified within the text.Keywords
CMOS integrated circuits; PCM coding/decoding; Analog integrated circuits; CMOS analog integrated circuits; CMOS logic circuits; CMOS process; Codecs; Feedback; Logic circuits; Logic devices; Phase change materials; System performance;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOM.1979.1094403
Filename
1094403
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