DocumentCode
757855
Title
Realization of ADM Arithmetic Signal Processors
Author
LoCicero, Joseph L. ; Schilling, Donald L. ; Garodnick, Joseph
Author_Institution
Illinois Inst of Tech., Chicago, IL
Volume
27
Issue
8
fYear
1979
fDate
8/1/1979 12:00:00 AM
Firstpage
1247
Lastpage
1254
Abstract
The purpose of this paper is to show that signals which are adaptive delta modulation (ADM) encoded can be arithmetically processed directly, without first decoding or converting to pulse code modulation (PCM) format. By operating on the serial DM bit streams, the sum, difference and product can be obtained in PCM and ADM format. Employing a four-term, non-recursive, averaging filter after the processors, we show that, for constant inputs, the signal-to-noise ratio (SNR) of the DM devices is exactly the same as that of their PCM counterparts. Although we have used the Song audio mode ADM [1] in the realization of our arithmetic processors, the designs are general enough to be applied to a large class of digital ADMs. To keep all systems practically realizable, we only employ operations which can be constructed with standard digital hardware, that is, adder, delays, hard-wired scalars and common logic circuits. Consequently, all our ADM devices can be manufactured with large scale integration where the distinct advantage is low cost and high reliability.
Keywords
Addition; Arithmetic; Delta modulation; Multiplication; Decoding; Delta modulation; Digital arithmetic; Filters; Modulation coding; Phase change materials; Process design; Pulse modulation; Signal processing; Signal to noise ratio;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOM.1979.1094526
Filename
1094526
Link To Document