DocumentCode
769961
Title
Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination
Author
Potkonjak, Miodrag ; Srivastava, Mani B. ; Chandrakasan, Anantha P.
Author_Institution
C&C Res. Labs., NEC USA Inc., Princeton, NJ, USA
Volume
15
Issue
2
fYear
1996
fDate
2/1/1996 12:00:00 AM
Firstpage
151
Lastpage
165
Abstract
Many applications in DSP, telecommunications, graphics, and control have computations that either involve a large number of multiplications of one variable with several constants, or can easily be transformed to that form. A proper optimization of this part of the computation, which we call the multiple constant multiplication (MCM) problem, often results in a significant improvement in several key design metrics, such as throughput, area, and power. However, until now little attention has been paid to the MCM problem. After defining the MCM problem, we introduce an effective problem formulation for solving it where first the minimum number of shifts that are needed is computed, and then the number of additions is minimized using common subexpression elimination. The algorithm for common subexpression elimination is based on an iterative pairwise matching heuristic. The power of the MCM approach is augmented by preprocessing the computation structure with a new scaling transformation that reduces the number of shifts and additions. An efficient branch and bound algorithm for applying the scaling transformation has also been developed. The flexibility of the MCM problem formulation enables the application of the iterative pairwise matching algorithm to several other important and common high level synthesis tasks, such as the minimization of the number of operations in constant matrix-vector multiplications, linear transforms, and single and multiple polynomial evaluations. All applications are illustrated by a number of benchmarks
Keywords
application specific integrated circuits; circuit CAD; circuit optimisation; high level synthesis; integrated circuit design; iterative methods; matrix multiplication; polynomials; branch and bound algorithm; common subexpression elimination; computation structure; constant matrix-vector multiplications; design metrics; high level synthesis tasks; iterative pairwise matching heuristic; linear transforms; multiple constant multiplications; multiple polynomial evaluations; scaling transformation; Design optimization; Digital signal processing; Graphics; High level synthesis; Iterative algorithms; Minimization methods; Polynomials; Telecommunication computing; Telecommunication control; Throughput;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.486662
Filename
486662
Link To Document