Plasma-charging effects on submicron MOS devices

Plasma-charging damage on gate dielectrics of MOS devices is an important issue because of shrinking dimension, plasma nonuniformity, and effects on high-k gate dielectrics. A comprehensive study of plasma-charging effects on the electrical properties of MOS devices was investigated in this work. Shunt diodes were used to estimate the charging polarity distribution. For high-frequency application, the 1/f noise was found to be a promising index for assessing plasma-charging damage. Gate oxynitride formed by two-step nitridation was demonstrated to have better electrical reliability as compared to the conventional one-step nitridation, especially accompanied by amorphous silicon gate electrode. This improvement could be attributed to the relaxation of interface stress by amorphous silicon gate electrode and the suppression of hydrogen effects by gate oxynitride using two-step nitridation. Plasma-charging damage on Si₃N₄ and Ta₂O₅ gate dielectrics with high dielectric constant was also investigated. For MOS devices with Si₃N₄ film, the leakier characteristic and shorter time to breakdown reveal its inferior reliability. For MOS devices with Ta₂O₅ gate dielectric, the trap-assisted current mechanism makes a thicker physical thickness of Ta₂O₅ film more susceptible to plasma-charging-induced damage. Smaller physical thickness of Ta₂O₅ film in MOS devices is favorable due to the better reliability and comparable plasma-induced electrical degradation