• DocumentCode
    772325
  • Title

    Cellular automata based minimum cost path estimation on binary maps

  • Author

    Tzionas, P. ; Tsalides, Ph. ; Thanailakis, A.

  • Author_Institution
    Democritus Univ. of Thrace, Xanthi, Greece
  • Volume
    28
  • Issue
    17
  • fYear
    1992
  • Firstpage
    1653
  • Lastpage
    1654
  • Abstract
    A new algorithm for the calculation of the minimum cost path between a pair of points on a binary map and its VLSI implementation using a new, multistate, 2D cellular automata architecture, are presented. The main advantages of the proposed architecture are that storage requirements are reduced to a minimum and the speed of operation is very high.
  • Keywords
    CMOS integrated circuits; VLSI; cellular arrays; circuit layout CAD; microprocessor chips; 2D cellular automata architecture; CAD; IC layout design; PCB layout; VLSI implementation; VLSI layout; automated wire routeing; binary maps; minimum cost path estimation; storage requirements;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19921052
  • Filename
    156310
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=772325