A Low-Noise Charge-Sensitive Preamplifier with a Field-Effect Transistor in the Input Stage

The excellent energy resolution of semiconductor radiation detectors has generated a need for charge-sensitive transistorized preamplifiers which have low values of noise line-widths. The application of field-effect transistors in charge-sensitive configurations was investigated, and a low-noise preamplifier was consequently developed. The preamplifier has a junction field-effect transistor in the input stage. The field-effect transistor is connected in cascode with the second stage bipolar transistor which has its collector load bootstrapped by a White follower. The bias stabilization is adequate for normal operation of the preamplifier over an FET temperature range from room temperature to liquid nitrogen temperature. Measured values of the preamplifier noise line-width as a function of pulse-shaping time constants, total input capacitance, and temperature are presented. Formulas are included for the theoretical determination of the noise line-width, Application of the formulas requires knowledge of the parameters of the preamplifier and pulse-shaping circuitry and the noise characteristics of the FET. The FET noise characteristics are shown as experimentally determined graphs of narrow-band equivalent noise resistance versus frequency, temperature, and bias point. Preamplifier noise line-widths less than 1.6 kev fwhm for silicon detectors (189 rms electronic charges) and slopes less than 0.06 kev/pf (7.1 rms electronic charges per pf) were obtained when the FET was cooled to the optimum temperature which was approximately 125°K.