A scalable architecture for modular multiplication based on Montgomery´s algorithm

Author

Tenca, Alexandre F. ; Koç, Çetin K.

Author_Institution

Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA

Volume

52

Issue

9

fYear

2003

Firstpage

1215

Lastpage

1221

Abstract

This paper presents a scalable architecture for the computation of modular multiplication, based on the Montgomery multiplication (MM) algorithm. A word-based version of MM is presented and used to explain the main concepts in the hardware design. The proposed multiplier is able to work with any precision of the input operands, limited only by memory or control constraints. Its architecture gives enough freedom to select the word size and the degree of parallelism to be used, according to the available area and/or desired performance. Design trade offs are analyzed in order to identify adequate hardware configurations for a given area or bandwidth requirement.

Keywords

cryptography; digital arithmetic; parallel algorithms; Montgomery algorithm; area requirement; bandwidth requirement; cryptography; hardware design; modular multiplication; parallelism; performance; scalable architecture; word-based version; Algorithm design and analysis; Arithmetic; Bandwidth; Computer architecture; Elliptic curve cryptography; Hardware; Memory management; Parallel processing; Software algorithms; Systolic arrays;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/TC.2003.1228516

Filename

1228516