Applying features of IEEE 754 to sign/logarithm arithmetic

Author

Arnold, Mark G. ; Bailey, Thomas A. ; Cowles, John R. ; Winkel, Mark D.

Author_Institution

Dept. of Comput. Sci., Wyoming Univ., Laramie, WY, USA

Volume

41

Issue

8

fYear

1992

fDate

8/1/1992 12:00:00 AM

Firstpage

1040

Lastpage

1050

Abstract

Various features found in standard floating point arithmetic (IEEE 754) are examined in light of their appropriateness for sign/logarithm arithmetic. The emphasis is on a 32-b word size comparable to IEEE 754 single precision, although other word sizes are possible. A multilayer sign/logarithm format is considered. The lowest layer, similar to previous implementations, would provide only normalized representations but would not provide representations for zero, denormalized values, infinities, and NaNs. The highest layer would provide most of the features found in IEEE 754, including zeros, denormalized values, infinities, and NaNs. Novel algorithms for implementing logarithmic denormalized arithmetic are presented. Simulation results show that the error characteristics of the proposed logarithmic denormalized arithmetic algorithms are similar to those of the denormalized floating point arithmetic in IEEE 754

Keywords

digital arithmetic; number theory; standards; 32 bit; IEEE 754; NaNs; denormalized values; infinities; logarithmic denormalized arithmetic algorithms; multilayer sign/logarithm format; sign/logarithm arithmetic; standard floating point arithmetic; zeros; Computational modeling; Computer errors; Computer science; Digital arithmetic; Floating-point arithmetic; H infinity control; Helium; Nonhomogeneous media; Roundoff errors;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/12.156547

Filename

156547