An asynchronous distributed approach for the simulation of behavior-level models on parallel processors

Traditional approaches to the distributed simulation of digital designs are limited in that they are inefficient and prone to deadlock for systems with feedback loops. This paper proposes an asynchronous distributed algorithm to the simulation and verification of behavior-level models and describes its implementation on an actual loosely-coupled parallel processor. The approach is relatively efficient for realistic digital designs and mathematically shown to be deadlock free. Additionally, it includes a new technique for modeling the timing of digital systems that guarantees the accuracy of the simulation results. In the discipline of computer-aided design of digital systems, a behavior model refers to a compact and executable representation of the activities of a complex digital component or an entire digital system such as the Motorola 68000, expressed through a high-level hardware description language such as ADLIB or VHDL. Behavior models are popular because of their flexibility; however, they execute excruciatingly slow on uniprocessor computers. The approach presented in this paper has the potential to significantly reduce the execution time through concurrent execution on multiple processors