Analogue integrated circuit sizing with several optimization runs using heuristics for setting initial points

Circuit sizing (i.e., determining MOSFET channel widths and lengths which result in the most appropriate and robust circuit) is an optimization process. When it is completed, there always remains a dilemma; namely, whether a better solution exists. With different starting points one can arrive at different local minima. A heuristic process, consisting of many optimization runs starting from different initial points, is proposed. It tries to find another local minimum of the cost function in every run and thus reveals some additional information about the circuit. The mathematical background of the algorithm used is described. Finally, the heuristic algorithm is tested on some real integrated operating amplifier designs. The results show that from the cost-function point of view surprisingly many equivalent solutions exist.