An improved model for ground-shielded CMOS test fixtures

Author

Kaija, Tero ; Ristolainen, Eero O.

Author_Institution

Inst. of Electron., Tampere Univ. of Technol., Finland

Volume

54

Issue

1

fYear

2006

Firstpage

82

Lastpage

87

Abstract

An improved model for ground-shielded (GS) test fixtures is proposed. The proposed model provides more accurate device-under-test gap behavioral model than previous test-fixture models and takes into account the impedance of the ground return path. The new model is validated up to 25 GHz by comparing the model simulations with experimental measurements. The proposed model is applied to bulk-silicon- and sapphire-based GS test fixtures with different layouts. Furthermore, a large phase shift in the shield-based test-fixture forward transmission is reported in this study. Based on the results achieved, suggestions for deembedding method selection are given. Test fixtures were fabricated using a 0.35-μm CMOS process and 0.5-μm silicon-on-sapphire CMOS process.

Keywords

CMOS integrated circuits; field effect MMIC; integrated circuit measurement; integrated circuit modelling; integrated circuit testing; microwave measurement; sapphire; shielding; silicon; silicon-on-insulator; 0 to 25 GHz; 0.35 micron; 0.5 micron; deembedding method selection; ground-shielded CMOS test fixtures; shield-based test-fixture forward transmission; silicon-on-sapphire CMOS process; CMOS process; Fixtures; Impedance; Insulation; Probes; Radio frequency; Semiconductor device measurement; Semiconductor device modeling; Silicon on insulator technology; Testing; Microwave measurements; RF CMOS; modeling; semiconductor device measurements; silicon-on-insulator (SOI) technology;

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/TMTT.2005.860895

Filename

1573799