Hemispherical grained Si formation on in-situ phosphorus doped amorphous-Si electrode for 256 Mb DRAM´s capacitor

Author

Watanabe, Hirohito ; Tatsumi, Toru ; Ohnishi, Sadayuki ; Kitajima, Hiroshi ; Honma, Ichirou ; Ikarashi, Taeko ; Ono, Haruhiko

Author_Institution

ULSI Device Dev. Labs., NEC Corp., Kanagawa, Japan

Volume

42

Issue

7

fYear

1995

fDate

7/1/1995 12:00:00 AM

Firstpage

1247

Lastpage

1254

Abstract

The cylindrical capacitor structure with hemispherical grained-Si (HSG-Si) described here reliably achieves a cell capacitance of 30 fF in a 0.4 μm-high storage electrode with a cell area of a 0.72 μm² for 256 Mbit dynamic random access memory. An HSG-Si formation technology using Si₂H₆-molecule irradiation and annealing enables control of the grain density and grain size of HSG-Si fabricated selectively on the whole surface of phosphorus-doped amorphous Si cylindrical electrodes

Keywords

DRAM chips; amorphous semiconductors; annealing; capacitors; electrodes; elemental semiconductors; grain growth; grain size; ion implantation; phosphorus; radiation effects; scanning electron microscopy; semiconductor-insulator-semiconductor devices; silicon; transmission electron microscopy; 0.4 mum; 256 Mbit; 30 fF; DRAM capacitor; LPCVD films; SEM micrographs; Si:P; Si₂H₆; Si₂H₆-molecule irradiation; SiO₂-Si₃N₄-Si; TEM micrographs; amorphous-Si electrode; annealing; cell capacitance; cylindrical capacitor structure; grain density control; grain size control; hemispherical grained Si formation; high storage electrode; in-situ P doping; ion implantation; stacked capacitors; Annealing; Capacitance; Capacitors; Electrodes; Grain size; Infrared heating; Random access memory; Size control; Surface cleaning; Temperature control;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.391206

Filename

391206