• DocumentCode
    801511
  • Title

    An improved Toom´s algorithm for linear convolution

  • Author

    Elnaggar, A. ; Aboelaze, M.

  • Author_Institution
    Dept. of Inf. Eng., Sultan Qaboos Univ., Muscat, Oman
  • Volume
    9
  • Issue
    7
  • fYear
    2002
  • fDate
    7/1/2002 12:00:00 AM
  • Firstpage
    211
  • Lastpage
    214
  • Abstract
    This article presents an improved Toom´s algorithm that allows hardware savings without slowing down the processing speed. We derive formulae for the number of multiplications and additions required to compute the linear convolution of size n = 2/sup /spl alpha//. We demonstrate the computational advantage of the proposed improved algorithm when compared to previous algorithms, such as the original matrix-vector multiplication and the FFT algorithms.
  • Keywords
    convolution; DSP algorithms; FFT algorithm; VLSI architecture; additions; hardware saving; improved Toom´s algorithm; linear convolution; matrix-vector multiplication; multiplexed architecture; postaddition; preaddition; processing speed; shuffle-free architecture; very large scale integration; Associate members; Computer architecture; Convolution; Convolvers; Hardware; Image processing; Matrix decomposition; Signal processing algorithms; Tensile stress; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Signal Processing Letters, IEEE
  • Publisher
    ieee
  • ISSN
    1070-9908
  • Type

    jour

  • DOI
    10.1109/LSP.2002.801718
  • Filename
    1025537