• DocumentCode
    801662
  • Title

    Radiation Hardening by Design of Asynchronous Logic for Hostile Environments

  • Author

    Barnhart, David J. ; Vladimirova, Tanya ; Sweeting, Martin N. ; Stevens, Kenneth S.

  • Author_Institution
    Surrey Space Centre, Univ. of Surrey, Guildford
  • Volume
    44
  • Issue
    5
  • fYear
    2009
  • fDate
    5/1/2009 12:00:00 AM
  • Firstpage
    1617
  • Lastpage
    1628
  • Abstract
    A wide range of emerging applications is driving the development of wireless sensor node technology towards a monolithic system-on-a-chip implementation. Of particular interest are hostile environment scenarios where radiation and thermal extremes exist. Radiation hardening by design has been recognized for over a decade as an alternative open-source circuit design approach to mitigate a spectrum of radiation effects, but has significant power and area penalties. Similarly, asynchronous logic design offers potential power savings and performance improvements, with a tradeoff in design complexity and a lesser area penalty. These side effects have prevented wider acceptance of both design approaches. A case study supporting the development of monolithic system-on-a-chip wireless sensor nodes is presented. Synchronous, hardened, and asynchronous/hardened implementations of a textbook microprocessor in 0.35 mum austriamicrosystems SiGe BiCMOS technology are compared. The synergy of this novel asynchronous/hardened design approach is confirmed by simulation and hardware results.
  • Keywords
    BiCMOS integrated circuits; asynchronous circuits; logic design; radiation hardening; system-on-chip; wireless sensor networks; BiCMOS technology; SiGe; asynchronous logic; hostile environments; radiation hardening; system-on-a-chip; wireless sensor node technology; Circuit synthesis; Logic design; Microprocessors; Open source software; Radiation effects; Radiation hardening; Sensor systems; Sensor systems and applications; System-on-a-chip; Wireless sensor networks; Asynchronous logic; environmental tolerance; radiation hardening by design; system-on-a-chip;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2009.2017005
  • Filename
    4907322