DocumentCode
80475
Title
The end of the shrink
Author
Courtland, Rachel
Volume
50
Issue
11
fYear
2013
fDate
Nov-13
Firstpage
26
Lastpage
29
Abstract
Andrew Kahng, a professor at the University of California, San Diego, and an expert on high-performance chip design, says the chip industry has made it a priority to keep up the pace of Moore´s Law, ensuring that manufacturers can continue to build and release new product families while using a new process every 18 to 24 months. This means there hasn´t been time to explore a number of design tricks that could be used to cut down on power or boost performance. “When you´re on that kind of schedule, you don´t have time to optimize things,” he says. As the value of the simple shrink decreases, he says, chipmakers should then be able to revisit their designs and find chip-improving approaches they may have missed or else left on the cutting-room floor.
Keywords
MOSFET; integrated circuit design; three-dimensional integrated circuits; FinFET; Moore´ Law; chip-improving approaches; design tricks; three-dimensional transistor; FinFETs; Logic gates; Technological innovation; Technology forecasting; Three dimensional displays; Transistors;
fLanguage
English
Journal_Title
Spectrum, IEEE
Publisher
ieee
ISSN
0018-9235
Type
jour
DOI
10.1109/MSPEC.2013.6655835
Filename
6655835
Link To Document