DocumentCode
8228
Title
Contention-aware selection strategy for application-specific network-on-chip
Author
Azampanah, Sanaz ; Khademzadeh, A. ; Bagherzadeh, Nader ; Janidarmian, Majid ; Shojaee, Reza
Author_Institution
CE Dept., Islamic Azad Univ., Tehran, Iran
Volume
7
Issue
3
fYear
2013
fDate
May-13
Firstpage
105
Lastpage
114
Abstract
Network-on-chip (NoC) performance largely depends on the underlying deadlock-free and efficient routing algorithm. The effectiveness of any adaptive routing algorithm strongly depends on the underlying selection strategy. When the routing function returns a set of admissible output channels with cardinality greater than one, a selection function is used to select the output channel to which the packet will be forwarded. In this study a novel selection strategy, LATEX, is proposed that can be used with any adaptive routing algorithm for specified applications. The objective of the proposed selection strategy is to efficiently balance traffic load and reach better performance results. Performance evaluation is carried out by using a flit-accurate simulator under two real traffic scenarios. Result experiments show that the proposed selection strategy applied to several routing algorithms significantly improves average delay, max delay and power consumption.
Keywords
application specific integrated circuits; circuit simulation; delay circuits; network routing; network-on-chip; performance evaluation; power aware computing; LATEX strategy; NoC performance evaluation; adaptive routing algorithm; application specific network-on-chip; average delay improvement; contention-aware selection strategy; deadlock-free algorithm; flit-accurate simulator; max delay improvement; output channel selection; packet forwarding; power consumption improvement; routing function; selection function; selection strategy; traffic load balancing;
fLanguage
English
Journal_Title
Computers & Digital Techniques, IET
Publisher
iet
ISSN
1751-8601
Type
jour
DOI
10.1049/iet-cdt.2011.0173
Filename
6547082
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