• DocumentCode
    823348
  • Title

    Adaptive mesh refinement for multilayer process simulation using the finite element method

  • Author

    Baccus, Bruno ; Collard, Dominique ; Dubois, Emmanuel

  • Author_Institution
    Inst. Superieur d´´Electron. du Nord, Lille, France
  • Volume
    11
  • Issue
    3
  • fYear
    1992
  • fDate
    3/1/1992 12:00:00 AM
  • Firstpage
    396
  • Lastpage
    403
  • Abstract
    An adaptive mesh refinement technique is proposed for a two-dimensional finite-element multilayer process simulator. Mesh refinement is based on the dopant concentration ratio inside each element, together with a prediction technique, minimizing the interpolation errors. A significant reduction in CPU time is obtained by automatic grid refresh. Several methods were tested. The mesh adequacy is evaluated with bipolar test structures using analytical punch-through voltage calculations. Applications of these methods are presented in two ways. First, an advanced trench-isolated polysilicon bipolar transistor was simulated to show the general possibilities of the techniques, and second, a coupled process and device simulation approach allows the evaluation of the scheme on real structures in relation to experimental measurements
  • Keywords
    digital simulation; electronic engineering computing; finite element analysis; integrated circuit technology; semiconductor device models; semiconductor technology; 2D FEM; CPU time reduction; adaptive mesh refinement; automatic grid refresh; bipolar test structures; coupled process/device simulation; dopant concentration ratio; finite element method; interpolation errors; multilayer process simulation; polysilicon bipolar transistor; prediction technique; punch-through voltage calculations; trench-isolated; Adaptive mesh refinement; Bipolar transistors; Computational modeling; Equations; Finite difference methods; Finite element methods; Interpolation; Mesh generation; Nonhomogeneous media; Testing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.124426
  • Filename
    124426