Multi-Strata Stealth Dicing Before Grinding for Singulation-Defects Elimination and Die Strength Enhancement: Experiment and Simulation

We report on defects characterization and reduction as well as die strength enhancement using stealth dicing (SD) on high-backside reflectance (82%) 2-D NAND memory wafers. This is performed using three-strata subsurface infrared (1.342 μm) nanosecond pulsed laser die singulation with a partial-SD before grinding integration approach. In this paper, a combination of simulation, characterization, and optimization of the multi-strata SD process has led to the elimination of mechanical and absorptive laser singulation related defects such as frontside and backside surface ablation, and topside, backside, and edge chipping. At the same time, the kerf width and kerf straightness are robust against the effects of test element structures located along the dicing streets. There is a consistent coverage of high-quality SD kerf production with near-zero kerf loss across the 300 mm wafer. Multi-strata SD-unique defects such as interference effects and inter-strata cleavage plane {111} damage have been addressed. SD-related integrated defects including Si dust residue post-backgrinding and die attach film-related defects post-die separation have also been resolved. We illustrate the performance of this approach by demonstrating defect-free eight die stacks of 25 μm thick memory dies.