DocumentCode
824966
Title
Class-based decompressor design for compressed instruction memory in embedded processors
Author
Weiss, Shlomo ; Beren, Shay
Author_Institution
Dept. of Electr. Eng. Syst., Tel Aviv Univ., Israel
Volume
52
Issue
11
fYear
2003
Firstpage
1495
Lastpage
1500
Abstract
We introduce a new PLA-based decoder architecture for random-access runtime decompression of compressed instruction memory in embedded systems. The compression method employs class-based coding. The symbol codebook used for decompression is fully programmable; thus, good compression may be achieved by adapting the codebook to the symbol frequency statistics of the target binary program. We show that this new class-based decoder architecture can be extended to provide high throughput decompression.
Keywords
codecs; data compression; decoding; embedded systems; instruction sets; microprocessor chips; programmable logic arrays; PLA-based decoder architecture; binary program; class-based decompressor design; code compression; compressed instruction memory; embedded processors; symbol codebook; Decoding; Embedded system; Frequency; Microprocessors; Runtime; Senior members; Statistics; System-on-a-chip; Throughput; Video compression;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2003.1244947
Filename
1244947
Link To Document