• DocumentCode
    826290
  • Title

    Study of turn-on test method for high-voltage thyristor valve

  • Author

    Kobayashi, S. ; Tanabe, S. ; Itoh, K.

  • Author_Institution
    Toshiba Corp., Tokyo, Japan
  • Volume
    8
  • Issue
    1
  • fYear
    1993
  • fDate
    1/1/1993 12:00:00 AM
  • Firstpage
    83
  • Lastpage
    89
  • Abstract
    Digital simulations have been conducted to analyze the thyristor valve turn-on phenomenon while a valve arrester is conducting, which gives the most severe turn-on stress for the valve. The effects of various other parameters have also been clarified. Based on this analysis, two test methods are proposed that verify a valve turn-on during arrester conduction, and their effectiveness is described. The nonrepetitive turn-on test given in the IEC Std Pb. 700 and IEEE Std 857 is studied, and a new test voltage level based on these analyses is proposed
  • Keywords
    digital simulation; power engineering computing; surge protection; testing; thyristor applications; HV thyristor valve; IEC Std Pb. 700; IEEE Std 857; arrester conduction; digital simulations; test voltage level; turn-on test method; Arresters; Delay effects; HVDC transmission; IEC standards; Production facilities; System testing; Thermal stresses; Thyristors; Valves; Voltage;
  • fLanguage
    English
  • Journal_Title
    Power Delivery, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8977
  • Type

    jour

  • DOI
    10.1109/61.180322
  • Filename
    180322