SEPIA: a new isolation structure for soft-error-immune LSIs

Author

Onai, Takahiro ; Nakamura, Tohru ; Homma, Noriyuki

Author_Institution

Hitachi Ltd., Tokyo, Japan

Volume

40

Issue

2

fYear

1993

fDate

2/1/1993 12:00:00 AM

Firstpage

402

Lastpage

406

Abstract

A new isolation structure for soft-error immunity has been developed. This structure, SEPIA (soft-error-preventing isolation by charge absorption), is suitable for advanced ULSIs such as 256-kb bipolar SRAMs. The SEPIA structure combines charge absorption and trench isolation. Experiments and simulations show that SEPIA reduces the amount of alpha-particle-induced charge collected in transistors. Electrons which diffuse in the substrate are absorbed by SEPIA. The collected charge is reduced to 20-30 fC, which is about 1/5 of the charge collected with the conventional structure. With SEPIA the amount of charge collected decreases as the transistor size is scaled down. SEPIA is thus more effective in the small transistors that will be used in advanced ULSIs

Keywords

VLSI; alpha-particle effects; bipolar integrated circuits; integrated circuit technology; 256 kbit; SEPIA; ULSIs; alpha-particle-induced charge; bipolar SRAMs; charge absorption; collected charge; isolation structure; soft-error immunity; soft-error-preventing isolation by charge absorption; trench isolation; Absorption; Alpha particles; Capacitance; Isolation technology; Large scale integration; MOS capacitors; MOSFETs; Silicon; Transistors; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.182520

Filename

182520