• DocumentCode
    838056
  • Title

    Reliability of CSP Interconnections Under Mechanical Shock Loading Conditions

  • Author

    Mattila, Toni T. ; Marjamäki, Pekka ; Kivilahti, Jorma K.

  • Author_Institution
    Lab. of Electron. Production Technol., Helsinki Univ. of Technol., Espoo
  • Volume
    29
  • Issue
    4
  • fYear
    2006
  • Firstpage
    787
  • Lastpage
    795
  • Abstract
    Failure modes and mechanisms under mechanical shock loading were studied by employing the statistical and fractographic research methods, and the finite element (FE) analysis. The SnAgCu-bumped components were reflow-soldered with the SnAgCu solder paste on Ni(P)|Au-coated and organic solderability preservative-coated multilayer printed wiring boards with and without micro-via structure in the soldering pads. The component boards were designed, fabricated, assembled, and drop tested according to the JESD22-B111 standard for portable electronic products. The test data were analyzed by utilizing the Weibull statistics, and the characteristic lifetimes (eta) and shape parameters (beta) were calculated. Statistically significant differences in the reliability were found between the different coating materials and pad structures. The results on the failed assemblies showed good correlation between the failure modes and the FE calculations. Under high deformation rates the solder material undergoes strong strain-rate hardening, which increases the stresses in the interconnections as compared to those in the thermal cycling tests. Therefore, the failure mechanisms under high deformation rates differed essentially from those observed in thermal cycling tests
  • Keywords
    Weibull distribution; chip scale packaging; failure analysis; finite element analysis; printed circuits; protective coatings; reflow soldering; solders; CSP interconnections; JESD22-B111 standard; NiP-Au- SnAgCu; Weibull statistics; characteristic lifetimes; chip scale package; coating materials; drop test; failure mechanisms; finite element analysis; mechanical shock loading; micro-via structure; multilayer printed wiring boards; organic solderability preservative coating; pad structures; portable electronic products; reflow soldering; shape parameters; solder material; solder paste; strain-rate hardening; Assembly; Electric shock; Electronic equipment testing; Failure analysis; Finite element methods; Life testing; Nonhomogeneous media; Soldering; Thermal stresses; Wiring; Chip scale package (CSP); JESD22-B111; drop test; finite element method (FEM); lead-free; printed wiring board (PWB) coating; reliability;
  • fLanguage
    English
  • Journal_Title
    Components and Packaging Technologies, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-3331
  • Type

    jour

  • DOI
    10.1109/TCAPT.2006.885948
  • Filename
    4016230