DocumentCode
84220
Title
Error Correction Encoding for Tightly Coupled On-Chip Buses
Author
Karmarkar, Kedar ; Tragoudas, Spyros
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
22
Issue
12
fYear
2014
fDate
Dec. 2014
Firstpage
2571
Lastpage
2584
Abstract
The performance of a tightly coupled on-chip bus connecting several embedded cores can be improved using multithreshold comparators at the receiver end. Reduction in supply voltage may cause bit errors. An on-chip encoding technique for error correction is proposed to improve the robustness of the method. It relies on a novel algorithmic formulation that exploits the inbuilt redundancy of the multithreshold architecture to reduce the number of redundant bits required to achieve error correction when compared with the existing methods. Extensive experimental evaluation confirms that the overhead of the proposed encoding technique is significantly less than that of the traditional encoding techniques that use a single threshold voltage. Experimental evidence demonstrates that the proposed encoding technique can be implemented on-chip in a scalable nonenumerative manner.
Keywords
comparators (circuits); encoding; error correction codes; bit errors; error correction encoding; multithreshold comparators; on-chip buses; on-chip encoding technique; Crosstalk; Encoding; Error correction; Receivers; Redundancy; Threshold voltage; Transient analysis; Bus encoding; crosstalk; error correction; multithreshold; multithreshold.;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2014.2300095
Filename
6729111
Link To Document